The present invention relates to a semiconductor memory wherein each of memory cells includes an insulated gate field effect transistor having a floating gate, and more particularly to such a memory having a function of verifying that a memory cell supplied with a programming voltage is actually programmed.
A semiconductor memory employing an insulated gate field effect transistor having a floating gate as a memory transistor is widely used as a programmable read only memory (PROM). The memory transistor further has a control gate connected to a word line and a drain-source path connected to a bit line. In a data programming (write) operation, a programming high voltage is applied to the control gate and the drain-source path to inject carriers into the floating gate, so that the threshold voltage of the memory transistor is shifted from a first, low value to a second, high value. The memory transistor has the first, low threshold voltage, if no carrier is injected into the floating gate or if the carriers are released from the floating gate.
Since the carrier injection depends on the value of the programming voltage and/or a time period for applying the programming voltage and further on electrical characteristics of the memory transistor, it is required to verify that the memory transistor applied with the programming voltage is actually programmed. For this purpose, the PROM is brought into a data read operation immediately after the data programming operation without changing address data to read out data of the memory transistor which has been supplied with the programming voltage. This operation mode is called "program verifying operation". In the program verifying operation, the control gate of the memory transistor is supplied with a reading-out voltage that is larger than the first threshold voltage but smaller than the second threshold voltage. When the memory transistor is actually programmed, therefore, it is not turned ON by the reading-out voltage, so that no current flows through the drain-source path of the memory transistor. The bit line is thereby held at a high level and a data read-out circuit coupled to the bit line produces output data of "1", for example. On the other hand, in case where the memory transistor is failed to be programmed, it is turned ON by the reading-out voltage. In this case, if the threshold voltage of the memory transistor is shifted to a third value that is slightly smaller than the reading-out voltage, the conductive resistant of the memory transistor is considerably large, so that only a small current flows through the drain-source path thereof. The potential level of the bit line is thereby lowered with a large time constant. For this reason, the data read-out circuit produces erroneously the output data of "1" during the program verifying operation period. Thus, there occurs error in judgement.